MicroCloud Hologram Inc. Utilizes FPGA to Accelerate Tensor Network Computing to Achieve Quantum Spin Models

MicroCloud Hologram Inc. (NASDAQ: HOLO), ("HOLO" or the "Company"), a technology service provider, proposed an innovative hardware acceleration technology that converts the quantum tensor network ...
TMCnet

MicroCloud Hologram Inc. Builds the Industry's First Multi-FPGA Quantum Fourier Transform Simulation Solution

MicroCloud Hologram Inc. (NASDAQ: HOLO), ("HOLO" or the "Company"), a technology service provider, launched a brand-new scalable quantum Fourier transform simulator technology based on multi-FPGA and ...
Seeking Alpha

WiMi Develops a Hybrid CPU-FPGA Quantum AI Simulator

BEIJING, Jan. 14, 2025 /PRNewswire/ -- WiMi Hologram Cloud Inc. (WIMI) ("WiMi" or the "Company"), a leading global Hologram Augmented Reality ("AR") Technology provider, today announced the ...
Business Insider

MicroCloud Hologram Inc. Develops Serial-Parallel Architecture-Based FPGA Quantum Computing Simulation Framework

SHENZHEN, China, Dec. 22, 2025 (GLOBE NEWSWIRE) -- MicroCloud Hologram Inc. (NASDAQ: HOLO), (“HOLO” or the "Company"), a technology service provider, launched a brand-new FPGA-based quantum computing ...
Nasdaq

Lattice Diamond Software Tool Delivers New Enhancements for FPGA Design, Simulation, and Verification

HILLSBORO, Ore.--(BUSINESS WIRE)-- Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced availability of the latest version of its popular FPGA design ...
Business Wire

Aldec Introduces Hardware Assisted RTL Simulation Acceleration for Microchip FPGA Designs

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has introduced a HES-DVM™ simulation ...
EDN

ASIC, FPGA simulator reduces run times

The Riviera 2005.08 ASIC, FPGA simulator tool provides VHDL and Verilog Linting and support for 64-bit Linux operating systems. The tool features a redesigned simulation engine that reduces simulation ...
Business Wire

Aldec Brings Assertions to FPGA Designers with the Release of Active-HDL 8.1

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed-language simulation for ASIC and FPGA devices, announced today the release of Active-HDL 8.1. The new release introduces a ...
Electronic Design

Mixed-Language Simulator Serves FPGA Designers

In the Active-HDL Designer Edition, a low-cost mixed-language RTL simulator, designers gain a high-performance simulator for designs targeted at FPGAs. Basically, FPGA designers have been forced to ...
Electronic Design

OPAL-RT Technologies supports FPGA motor simulation

May 12, 2014. OPAL-RT Technologies has created a suite of tools to make FPGA-based simulation accessible to engineers developing controllers for electric drives. A press release from PRNewswire points ...
Semiconductor Engineering

HDL Simulation Acceleration Solution For Microchip FPGA Designs

A way to accelerate a HDL simulation for a system FPGA design that includes the custom logic and reused IP cores where the testbench executes in the simulator and the synthesizable parts of the design ...